The present invention relates to a method of thermally processing selected areas of an exposed surface of a workpiece through the use of a pulsed heat energy source, and, more particularly, to such thermal processing method wherein the heat source comprises a blanket source of heat.
Workpieces on which selective deposition of material or selective etching is desired include, by way of example, semiconductor electrical devices and printed-wiring boards that are undergoing fabrication. For example, the fabrication of semiconductor devices typically involves the deposition of material, such as metallization or a dielectric, on selected areas of a semiconductor device, and also typically involves etching of material, such as semiconductor material, metal, or dielectric, from the semiconductor device at selected locations. The localization of material to be deposited onto a semiconductor device, or of an etchant for removing material at selected locations, may be performed through the use of a standard photolithographic mask that conceals areas of a semiconductor device on which deposition or etching is to be avoided. Unless such photolithographic mask is the first mask used in device processing, it usually must be carefully aligned with previously-defined features of the device in an alignment process known as registration of the mask to such previous features. To assure a high device manufacturing yield, allowance for tolerances in registration alignment must be made. This requirement, unfortunately, restricts the minimum feature size of the device. Moreover, the added fabrication complexity entailed by use of a photolithographic mask adds to device cost.
Workpieces other than semiconductor devices also suffer from the drawbacks of photolithographic masking to define localized areas for deposition of material or etching. For example, alumina or silicon circuit boards and plastic printed-wiring boards fall into this category. It would thus be desirable to provide a technique for depositing material or etching in selected locations of a workpiece, such as a semiconductor device, wherein the desired features are automatically registered to previous structures. This would avoid the need for alignment tolerances that restrict minimum feature size, while assuring high manufacturing yields.